'VHDL how to use "unsigned" signal as counter for selecting exact bit of signal?

I have task to do two number multiplier, and now I am stuck with next problem: In my code, I had idea to use unsigned i(0 to 3) as 4-bit counter and then in cycle somehow take bit of register B with number of i (regB(i)) and then use it for further actions. I tried to do it simply as I wrote before (regB(i)) but it gives me an error. Could somebody tell me please if there is more clever way to do this than creating a multiplexor?

library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.NUMERIC_STD.ALL;

entity multiplier is 
port (A, B  : in signed(0 to 10);
    rest   : in bit;
    result : out signed(0 to 10);
    ready  : out bit := '1';
    clk    : in bit);
end multiplier;

architecture solution of multiplier is
  signal regA, regNB, regRes: signed(0 to 10);
  signal regB: signed(0 to 11);
  signal i: unsigned(0 to 3) := "0000";
begin 
process begin
    wait on rest until rest='0' and clk='1';
     regA <= A;
     regB <= B&'0';
     regRes <= (others => '0');
 regNB <= -B(0 to 10);
 i <= "0000";
 ready <= '0';
 wait on clk until clk='1';
 while i /= "1011" loop
    if(regB(i) = '0') then
    end if;
     wait on clk until clk='1';
     i <= i + 1;
 end loop;
 --wait on clk until clk='1';
 ready <= '1';
 result <= regA;
  end process;
end solution;


Solution 1:[1]

You error occurs because slicing or indexing a signed type requires the use of integers. You have used unsigned. Hence you need to convert the type before indexing:

regB(to_integer(i)) = '0'

Side note: I assume you only wish to simulate this code as it is not synthesisable.

Sources

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Source: Stack Overflow

Solution Source
Solution 1 Tricky