'Implementation of mux - 4x1 using 2x1

Hi I am absolutely new to vhdl and I have been given this assignment of implementing a 4x1 MUX using 2x1 MUX. However when executing with ghdl I am getting some warnings which is beyond my level of understanding. My code is:

---test_mux41_using_mux21.vhdl---
----------------------------------------------------------------------------------
-- Company: 
-- Engineer: 
-- 
-- Create Date: 28.04.2022 21:23:37
-- Design Name: 
-- Module Name: test_mux41_using_mux21 - structural
-- Project Name: 
-- Target Devices: 
-- Tool Versions: 
-- Description: 
-- 
-- Dependencies: 
-- 
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
-- 
----------------------------------------------------------------------------------


library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;

-- Uncomment the following library declaration if instantiating
-- any Xilinx leaf cells in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity test_mux41_using_mux21 is
    Port ( i1 : in STD_LOGIC;
           i2 : in STD_LOGIC;
           i3 : in STD_LOGIC;
           i4 : in STD_LOGIC;
           s0 : in STD_LOGIC;
           s1 : in STD_LOGIC;
           o : out STD_LOGIC);
end test_mux41_using_mux21;

architecture structural of test_mux41_using_mux21 is

component test_mux21 is
    Port ( i1 : in STD_LOGIC;
           i2 : in STD_LOGIC;
           s : in STD_LOGIC;
           o : out STD_LOGIC);
end component;

signal t1, t2, t3:STD_LOGIC;

begin

    mux1 : test_mux21 PORT MAP(i1, i2, s0, t1);
    mux2 : test_mux21 PORT MAP(i3, i4, s0, t2);
    mux3 : test_mux21 PORT MAP(t1, t2, s1, t3);

    o <= t3;

end structural;

My equivalent test bench is :

---mux41_using_mux21_tb.vhdl---
-------------------------------------------------------------------------------------
-- Company: 
-- Engineer: 
-- 
-- Create Date: 28.04.2022 21:23:37
-- Design Name: 
-- Module Name: mux41_using_mux21_tb - Behavioral
-- Project Name: 
-- Target Devices: 
-- Tool Versions: 
-- Description: 
-- 
-- Dependencies: 
-- 
-- Revision:
-- Revision 0.01 - File Created
-- Additional Comments:
-- 
----------------------------------------------------------------------------------


library IEEE;
use IEEE.STD_LOGIC_1164.ALL;

-- Uncomment the following library declaration if using
-- arithmetic functions with Signed or Unsigned values
--use IEEE.NUMERIC_STD.ALL;

-- Uncomment the following library declaration if instantiating
-- any Xilinx leaf cells in this code.
--library UNISIM;
--use UNISIM.VComponents.all;

entity mux41_using_mux21_tb is
--  Port ( );
end mux41_using_mux21_tb;


architecture Behavioral of mux41_using_mux21_tb is
component test_mux41_using_mux21
    Port ( i1 : in STD_LOGIC;
           i2 : in STD_LOGIC;
           i3 : in STD_LOGIC;
           i4 : in STD_LOGIC;
           s0 : in STD_LOGIC;
           s1 : in STD_LOGIC;
           o : out STD_LOGIC);
end component;

signal i11 : STD_LOGIC :='0';
signal i21 : STD_LOGIC :='0';
signal i31 : STD_LOGIC :='0';
signal i41 : STD_LOGIC :='0';
signal s01 : STD_LOGIC :='0';
signal s11 : STD_LOGIC :='0';
signal o1 : STD_LOGIC;


begin

uut: test_mux41_using_mux21 PORT MAP
    ( i1 => i11,
      i2 => i21,
      i3 => i31,
      i4 => i41,
      s0 => s01,
      s1 => s11,
      o => o1);

stim_proc: process

begin

    i11<='0';
    i21<='0';
    i31<='0';
    i41<='0';
    s01<='0';
    s11<='0';
    
    wait for 100 ns;
    
    i11<='0';
    i21<='0';
    i31<='0';
    i41<='0';
    s01<='0';
    s11<='1';
    
    wait for 100 ns;
    
    i11<='0';
    i21<='0';
    i31<='0';
    i41<='0';
    s01<='1';
    s11<='0';
    
    wait for 100 ns;
    
    i11<='0';
    i21<='0';
    i31<='0';
    i41<='0';
    s01<='1';
    s11<='1';
    
    wait for 100 ns;
    
    i11<='0';
    i21<='0';
    i31<='0';
    i41<='1';
    s01<='0';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='0';
    i21<='0';
    i31<='0';
    i41<='1';
    s01<='0';
    s11<='1';
    
    wait for 100 ns;
        
    i11<='0';
    i21<='0';
    i31<='0';
    i41<='1';
    s01<='1';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='0';
    i21<='0';
    i31<='0';
    i41<='1';
    s01<='1';
    s11<='1';
    
    wait for 100 ns;
        
    i11<='0';
    i21<='0';
    i31<='1';
    i41<='0';
    s01<='0';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='0';
    i21<='0';
    i31<='1';
    i41<='0';
    s01<='0';
    s11<='1';
    
    wait for 100 ns;
        
    i11<='0';
    i21<='0';
    i31<='1';
    i41<='0';
    s01<='1';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='0';
    i21<='0';
    i31<='1';
    i41<='0';
    s01<='1';
    s11<='1';
    
    wait for 100 ns;
        
    i11<='0';
    i21<='0';
    i31<='1';
    i41<='1';
    s01<='0';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='0';
    i21<='0';
    i31<='1';
    i41<='1';
    s01<='0';
    s11<='1';
    
    wait for 100 ns;
        
    i11<='0';
    i21<='0';
    i31<='1';
    i41<='1';
    s01<='1';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='0';
    i21<='0';
    i31<='1';
    i41<='1';
    s01<='1';
    s11<='1';
    
    wait for 100 ns;
        
    i11<='0';
    i21<='1';
    i31<='0';
    i41<='0';
    s01<='0';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='0';
    i21<='1';
    i31<='0';
    i41<='0';
    s01<='0';
    s11<='1';
    
    wait for 100 ns;
    
    i11<='0';
    i21<='1';
    i31<='0';
    i41<='0';
    s01<='1';
    s11<='0';
    
    wait for 100 ns;
    
    i11<='0';
    i21<='1';
    i31<='0';
    i41<='0';
    s01<='1';
    s11<='1';
    
    wait for 100 ns;
    
    i11<='0';
    i21<='1';
    i31<='0';
    i41<='1';
    s01<='0';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='0';
    i21<='1';
    i31<='0';
    i41<='1';
    s01<='0';
    s11<='1';
    
    wait for 100 ns;
        
    i11<='0';
    i21<='1';
    i31<='0';
    i41<='1';
    s01<='1';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='0';
    i21<='1';
    i31<='0';
    i41<='1';
    s01<='1';
    s11<='1';
    
    wait for 100 ns;
        
    i11<='0';
    i21<='1';
    i31<='1';
    i41<='0';
    s01<='0';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='0';
    i21<='1';
    i31<='1';
    i41<='0';
    s01<='0';
    s11<='1';
    
    wait for 100 ns;
        
    i11<='0';
    i21<='1';
    i31<='1';
    i41<='0';
    s01<='1';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='0';
    i21<='1';
    i31<='1';
    i41<='0';
    s01<='1';
    s11<='1';
    
    wait for 100 ns;
        
    i11<='0';
    i21<='1';
    i31<='1';
    i41<='1';
    s01<='0';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='0';
    i21<='1';
    i31<='1';
    i41<='1';
    s01<='0';
    s11<='1';
    
    wait for 100 ns;
        
    i11<='0';
    i21<='1';
    i31<='1';
    i41<='1';
    s01<='1';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='0';
    i21<='1';
    i31<='1';
    i41<='1';
    s01<='1';
    s11<='1';
    
    wait for 100 ns;
    
    i11<='1';
    i21<='0';
    i31<='0';
    i41<='0';
    s01<='0';
    s11<='0';
    
    wait for 100 ns;
    
    i11<='1';
    i21<='0';
    i31<='0';
    i41<='0';
    s01<='0';
    s11<='1';
    
    wait for 100 ns;
    
    i11<='1';
    i21<='0';
    i31<='0';
    i41<='0';
    s01<='1';
    s11<='0';
    
    wait for 100 ns;
    
    i11<='1';
    i21<='0';
    i31<='0';
    i41<='0';
    s01<='1';
    s11<='1';
    
    wait for 100 ns;
    
    i11<='1';
    i21<='0';
    i31<='0';
    i41<='1';
    s01<='0';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='1';
    i21<='0';
    i31<='0';
    i41<='1';
    s01<='0';
    s11<='1';
    
    wait for 100 ns;
        
    i11<='1';
    i21<='0';
    i31<='0';
    i41<='1';
    s01<='1';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='1';
    i21<='0';
    i31<='0';
    i41<='1';
    s01<='1';
    s11<='1';
    
    wait for 100 ns;
        
    i11<='1';
    i21<='0';
    i31<='1';
    i41<='0';
    s01<='0';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='1';
    i21<='0';
    i31<='1';
    i41<='0';
    s01<='0';
    s11<='1';
    
    wait for 100 ns;
        
    i11<='1';
    i21<='0';
    i31<='1';
    i41<='0';
    s01<='1';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='1';
    i21<='0';
    i31<='1';
    i41<='0';
    s01<='1';
    s11<='1';
    
    wait for 100 ns;
        
    i11<='1';
    i21<='0';
    i31<='1';
    i41<='1';
    s01<='0';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='1';
    i21<='0';
    i31<='1';
    i41<='1';
    s01<='0';
    s11<='1';
    
    wait for 100 ns;
        
    i11<='1';
    i21<='0';
    i31<='1';
    i41<='1';
    s01<='1';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='1';
    i21<='0';
    i31<='1';
    i41<='1';
    s01<='1';
    s11<='1';
    
    wait for 100 ns;
        
    i11<='1';
    i21<='1';
    i31<='0';
    i41<='0';
    s01<='0';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='1';
    i21<='1';
    i31<='0';
    i41<='0';
    s01<='0';
    s11<='1';
    
    wait for 100 ns;
    
    i11<='1';
    i21<='1';
    i31<='0';
    i41<='0';
    s01<='1';
    s11<='0';
    
    wait for 100 ns;
    
    i11<='1';
    i21<='1';
    i31<='0';
    i41<='0';
    s01<='1';
    s11<='1';
    
    wait for 100 ns;
    
    i11<='1';
    i21<='1';
    i31<='0';
    i41<='1';
    s01<='0';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='1';
    i21<='1';
    i31<='0';
    i41<='1';
    s01<='0';
    s11<='1';
    
    wait for 100 ns;
        
    i11<='1';
    i21<='1';
    i31<='0';
    i41<='1';
    s01<='1';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='1';
    i21<='1';
    i31<='0';
    i41<='1';
    s01<='1';
    s11<='1';
    
    wait for 100 ns;
        
    i11<='1';
    i21<='1';
    i31<='1';
    i41<='0';
    s01<='0';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='1';
    i21<='1';
    i31<='1';
    i41<='0';
    s01<='0';
    s11<='1';
    
    wait for 100 ns;
        
    i11<='1';
    i21<='1';
    i31<='1';
    i41<='0';
    s01<='1';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='1';
    i21<='1';
    i31<='1';
    i41<='0';
    s01<='1';
    s11<='1';
    
    wait for 100 ns;
        
    i11<='1';
    i21<='1';
    i31<='1';
    i41<='1';
    s01<='0';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='1';
    i21<='1';
    i31<='1';
    i41<='1';
    s01<='0';
    s11<='1';
    
    wait for 100 ns;
        
    i11<='1';
    i21<='1';
    i31<='1';
    i41<='1';
    s01<='1';
    s11<='0';
    
    wait for 100 ns;
        
    i11<='1';
    i21<='1';
    i31<='1';
    i41<='1';
    s01<='1';
    s11<='1';
    
    wait for 100 ns;

end process;

end Behavioral;

I have been taught like do this and then do that so I am not exactly sure of what is going on. PS: Code was first executed in Vivado.

The error message is:

ghdl -e mux41_using_mux21_tb
test_mux41_using_mux21.vhdl:57:8:warning: component instance "mux1" is not bound
test_mux41_using_mux21.vhdl:44:14:warning: (in default configuration of test_mux41_using_mux21(structural))
test_mux41_using_mux21.vhdl:58:8:warning: component instance "mux2" is not bound
test_mux41_using_mux21.vhdl:44:14:warning: (in default configuration of test_mux41_using_mux21(structural))
test_mux41_using_mux21.vhdl:59:8:warning: component instance "mux3" is not bound
test_mux41_using_mux21.vhdl:44:14:warning: (in default configuration of test_mux41_using_mux21(structural))

Please help.

Sources

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Source: Stack Overflow

Solution	Source

'Implementation of mux - 4x1 using 2x1

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