Can't read file in VHDL with GHDL

Question

This doesn't work. Error seems to appear whenever I change variable line_content : string(1 to 4) to string(1 to 20).

It says that there is an assertion failure: string read failure. assertion failed. simulation failed.

LIBRARY ieee; 
USE ieee.std_logic_1164.ALL;
use STD.textio.all; 

ENTITY read_file IS
END read_file;

ARCHITECTURE beha OF read_file IS 

BEGIN
-- Read process
    process 
      file file_pointer : text;
      variable line_content : string(1 to 20);
      variable line_num : line;

    begin
        --Open the file read.txt from the specified location for reading(READ_MODE).
      file_open(file_pointer,"1.txt",READ_MODE);    
      while not endfile(file_pointer) loop --till the end of file is reached continue.
        readline (file_pointer,line_num);  --Read the whole line from the file
        --Read the contents of the line from  the file into a variable.
        READ (line_num,line_content); 
            report line_content;
      end loop;
      file_close(file_pointer);  --after reading all the lines close the file.  
        wait;
    end process;
end beha;