'Will all cores in a multi-core processor share control registers?

I read the introduction of the CR0.CD flag in both the AMD and Intel manuals and get the following 2 questions:

  1. Does the setting of CR0 affect all cores? In other words, does each core have a separate set of control registers?
  2. Does setting the CD flag to 1 only disable the internal caches, or the external caches also disabled as well? The interpretation of Intel and AMD are different.
assemblyx86-64cpu-architecture


Sources

This article follows the attribution requirements of Stack Overflow and is licensed under CC BY-SA 3.0.

Source: Stack Overflow

Solution Source

Related Questions