Why Different modes are provided in SPI communication?

Question

I am reading various documents over the internet, and find some data and communication mechanism about how SPI protocol works. but I am unable to find the logic behind separating the modes in SPI communication means why there are four modes are provided in SPI communication?

Answer 1

Four modes are consist of four combination of "Clock Polarity(CPOL)" and "Clock Phase(CPHA)".

Mode 0 -> CPOL = 0, CPHA = 0
Mode 1 -> CPOL = 0, CPHA = 1
MODE 2 -> CPOL = 1, CPHA = 0
MODE 3 -> CPOL = 1, CPHA = 1

Mode 0 - Since clock polarity is 0, that means when there is no data transmission, the clock will be pulled down to 0. So Idle is Low. Since clock phase is 0, the data will be sampled on the leading edge of the clock cycle.

Mode 1 - Since clock polarity is 0, that means when there is no data transmission, the clock will be pulled down to 0. So Idle is Low. Since clock phase is 1, the data will be sampled on the trailing edge of the clock cycle.

Mode 2 - Since clock polarity is 1, that means when there is no data transmission, the clock will be pulled up to 1. So Idle is High. Since clock phase is 0, the data will be sampled on the leading edge of the clock.

Mode 3 - Since clock polarity is 1, that means when there is no data transmission, the clock will be pulled up to 1. So Idle is High. Since clock phase is 1, the data will be sampled on the trailing edge of the clock cycle.

Please follow the link to understand the clock diagrams.

Also remember that not all SPI devices support all the modes. So you need to see the device datasheet to find out the modes and while communicating with that device, you need to first set the proper mode by programming relevant host register and then start the communication.

Answer 2

According to https://www.corelis.com/education/tutorials/spi-tutorial/:

Clock polarity (CPOL) and clock phase (CPHA) can be specified as ‘0’ or ‘1’ to form four unique modes to provide flexibility in communication between master and slave as shown in Figure 2.

Now provide flexibility isn't exactly clear to me. My unqualified guess is that some devices capable/designed to respond more quickly than others. Hence the different modes. The descriptions at http://dlnware.com/theory/SPI-Transfer-Modes reinforce (to me) that conclusion.

Just an unqualified hypothesis on my part.

Answer 3

SPI Communication has 4 Different Modes because it is only a de facto Standard. It was developed by Motorola in 87'. (Going to Freescale and then NXP) But Motorola did not define a fixed ClockPolarity and ClockPhase in their design recommendation. They could be freely choosen by users. Therefore Engineers using SPI could choose themselves wether the Clock is Active High or Low and wether the shiftregister reacts on a falling edge or rising edge. With 2 variables a 2 options, this generates 4 different possible modes.

Most devices Use Mode 0 however.

In conclusion, because motorola did leave it open in its development and there was never a standard introduced that imposed it.

Here you can read the original Application Note from 1987: http://www.bitsavers.org/components/motorola/_appNotes/AN-0991_Using_the_Serial_Peripheral_Interface_to_Communicate_between_Multiple_Microcomputers.pdf