'using a 32bit ARM processor to write 64bit atomic operation in assembly in user mode in a multithreaded system (is it possible?)
I wanted to write assembly language for an atomic64bit read/write function for a multithreaded OS, however the processor I am using is 32bit (AM574x, AM576x, Sitara Processors, Cortex A15 using the ARMv7-A architecture) and it is running in user mode and it needs to stay in user mode (means disable interrupt won't work - CPSID I). In assembly is there a way to do this?
Solution 1:[1]
Refer to section A3.4 “Synchronization and semaphores” of the ARM Architecture Reference Manual Armv7-A and ARMv7-R Edition (DDI 0406C).
This boils down to using the ldrexd and strexd instructions in a loop:
@ assuming r0 holds the address, r1:r2 holds the datum to be stored
again: ldrexd r3, r4, [r0] @ retrieve old value, tag memory
strexd r3, r1, r2, [r0] @ attempt to store
cmp r3, #0 @ did the store succeed?
bne again
The ldrexd instruction is required to tag the memory for the exclusive store. It cannot be eliminated. You must perform this operation in a loop as it can spuriously fail.
Sources
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Source: Stack Overflow
| Solution | Source |
|---|---|
| Solution 1 | fuz |
