How can I implement this register file Verilog module

Question

This is the module I have been provided, I need to design a register file module using this format.

module RegisterFile(ReadRegister1, ReadRegister2, WriteRegister, WriteData, RegWrite,
Clk, ReadData1, ReadData2);
  input [4:0] ReadRegister1, ReadRegister2; // Two registers to be read
  input [4:0] WriteRegister; // Register address to write into
  input [31:0] WriteData; // Data to be written into WriteRegister
  input RegWrite; // RegWrite control signal. Data is written only when this signal is enabled
  input Clk; // very important!
  output [31:0] ReadData1, ReadData2;

I understand that the two read registers and the write register are the register numbers according to MIPS. However, I'm not sure exactly what the write data and read datas are supposed to be and why they are 32 bits long. Also, I'm assuming data is always read on posedge clk but only written when regwrite is true.

Are write data and the read datas supposed to be each of the 32 registers in MIPS? I am thinking this because a hint we are provided with is that we can use two-dimensional arrays within verilog. If this is the case how can I implement this? If not what is the purpose of the write data and read data arrays?

Answer 1

If you're confused about why some of these are 32 bits in width, then start with a review of what the MIPS registers are, and what the register block does.

The registers on MIPS are 32-bits wide.  There are 32 of them, with the caveat that the 0th register must be designed so that it always reads as the value zero.

The register block provides the storage for and access to values held by the MIPS registers.

During instruction decode, the register numbers — two 5 bit fields — from the fetched instruction are feed into the register block, so that the register block will output the 32-bit values held in those register numbers.  Those outputs connect to the ALU, which takes two 32-bit inputs, so it might do a 32-bit add or something else.

During writeback the register block captures whatever value is on WriteData, and puts that into the register identified by WriteRegister — when RegWrite is asserted.  (Later when the machine code program reads that register, the most recent value written to that register will be output.)

So, register names (numbers) are 5 bits wide and datapath values are 32-bits wide.

What you need to do is implement the above description:  Create a 32 element array, whose elements are each 32 bits in width.  Retrieve the values needed for output from the array given the register numbers, and store the given value in the given register on write.

Also, make sure the 0 register always reads as the value 0.

And further, if there's a write operation, the circuit should allow forwarding that new value to the output(s) rather than forwarding a stale value from the registers array.