I'm attempting to run Quartus II ( Quartus Prime Version 21.1.0 Build 842 10/21/2021 Sj Lite Edition) on linux Pop OS 21.10. I fail to produce result on output
currently I am trying to write a VHDL wrapper for this Opencore Verilog module (1-wire master) so that I can send/receive from this temperature sensor (DS18B20)
i am a bit new to VHDL and i try to learn by examples. So long story short i began with some basic examples like creating this Full Adder. entity FA is Port
Now i make a circuit to measure temperature and humidity, then display on LCD. This is my code for DHT22, i use Elbert V2. After genarating my project, it did
In Vivado I succesfully made a simple blockdiagram to control the LEDs of my Zybo board. I can observe that the offset address for my LEDs is: 0x4120 0000 and t
I am trying to use fixed point numbers in my VHDL project, but I keep having trouble implementing the library (found here http://www.eda-stds.org/fphdl/fixed_pk