'Testing if a file exists in a make file

I need to add some logic to a make file and I am stuck. I see several examples out there but I'm not sure which one is the right one for me.

What I have:

$(UBIN)/%:
    $(CC) $(CFLAGS) -o $(UBIN)/$* $(OBJS) -L $(ORAHOME) $(ORALIBS) \
        $(LNKPATH) $(DSTN_LIBS)
    @echo ""

What I want:

$(UBIN)/%:
    if the file $(UBIN)/$* exists
    then
      $(CC) $(CFLAGS) -o $(UBIN)/$* $(OBJS) -L $(ORAHOME) $(ORALIBS) \
          $(LNKPATH) $(DSTN_LIBS)          
      @echo ""
    endif

But I can't figure out what the right syntax is. Some idea were to use a wildcard string holder, some use some -a option, some use if some use ifeq some include semicolons and some do not.

The current list of make files we use has ZERO examples of this logic so I have nothing to compare it to for my build environment.

Many thanks

if-statementmakefilelogic


Solution 1:[1]

Assuming you don't want to see the compilation or the echo commands something like the following should work (untested written in the answer box).

$(UBIN)/%:
    @if [ -f '$@' ]; then \
        $(CC) $(CFLAGS) -o '$@' $(OBJS) -L $(ORAHOME) $(ORALIBS) \
        $(LNKPATH) $(DSTN_LIBS); \
        echo ""; \
    fi

If you do want to see the compilation command (but not the echo command) that's likely a bit more complicated (I don't have a ready solution to that offhand).

Solution 2:[2]

GNU make has some nice macrose encoded in functions, consider wildcard and shell as exemplars to address this ask (no guarauntees, but look at the macros):

ifeq(,$(wildcard paths.txt))
target: export PATH=$(PATH):$(subst \n,:,$(shell cat paths.txt))
else
target: export PATH=$(PATH_CLEAN)
endif
target:
    $(MAKE) -C task_in_path

Sources

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Source: Stack Overflow

Solution Source
Solution 1 Sky Voyager
Solution 2 Sky Voyager

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