'Documentation on MSI Address/Data register content expectations for AMD cpus?

Where I can find info on AMD Ryzen CPUs and how they expect MSI address/data to be programmed? The Intel manual is crystal clear in its description (pictured below) but MSI Address/Data registers are implementation dependent according to the PCIe spec.

Intel CPU Message Address Register Format

Intel CPU Message Data Register Format I can't find anything in AMD's System Programmer Manual, or the Kernel and BIOS developer Guide explicitly stating how these registers should be programmed. Experimentation confirms that it appears to operate the same as Intel CPUs, but I'd like to find explicit documentation backing this up. Anyone know where this is stated?



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