'Curious feature in GNU Make: Makefile.c

When there is no Makefile but a Makefile.c, GNU Make automatically tries to:

cc Makefile.c -o Makefile

and then use that Makefile.

As far as I can see, if Makefile.c contains valid C source then a binary is produced and that binary is not a valid Makefile. If it was not valid source then the process is aborted (no Makefile produced/run). So both cases seem useless.

I tried making a Makefile.asm because assembly can be assembled into a valid Makefile, but this time GNU Make did not recognize the file. (Does the feature only trigger for Makefile.c?)

What is the purpose of this feature?



Solution 1:[1]

It is just a consequence of the built-in rules which tell make how to generally make % from %.c if the latter exists but not the former. It is coincidental and this specific case you are asking about not something clever you should spend effort on trying to understand.

(Though I suppose it could be a fun corner case to exploit if you wanted to participate in the International Obfuscated C Code Contest.)

Sources

This article follows the attribution requirements of Stack Overflow and is licensed under CC BY-SA 3.0.

Source: Stack Overflow

Solution Source
Solution 1 tripleee