csapp 2e A question about decode stage in PIPE Stage Implementations

Question

In section 4.5.10(Decode and Write-Back Stages) Figure 4.56, the book says "Observe that the register IDs supplied to the write ports come from the write-back stage (signals W_dstE and W_dstM), rather than from the decode stage. This is because we want the writes to occur to the destination registers specified by the instruction in the write-back stage."

My question is how do it know the signals W_dstE and W_dstM come from the write-back stage are exactly the register write locations in the decode stage.

See the assembly codes below, assume that instcurtion 4 is in decode stage meanwhile instcurtion 1 is in write-back stage.The W_dstE come from write-back stage in instcurtion 1 is the register ID of %ebx but the decode stage in instcurtion 4 needs the register ID of %esi.

1 irrmovl %eax, %ebx  
2 nop
3 nop
4 irrmovl %ecx, %esi

Dit i get something wrong?