I am using a makefile in windows to push some files on a Unix server (here a text file "blob.txt" in the same folder of my makefile). My makefile script is: se
I am completely new to using autotools so it might be a dumb question but I'll try anyway. I have two pieces of Makefile.am. Except one is working fine and the
I'm trying to install different software onto my Raspberry Pi with Debian Wheezy OS. When I run try to configure software I'm trying to install I get this outpu
On a Linux machine I can do: ./configure make install to build from source. However, when I copy that build to another machine, obviously
The docker command "docker container rm $(docker ps -aq) -f" works fine from the command line. However, when I try to run it from a makefile using the followin
I code in C/C++ and use a (GNU) Makefile to compile the code. I can do the same with CMake and get a Makefile. However, what is the difference between using a M
I am currently studying K&R and I would like to create a Makefile in order to automate the compiling process. I have a directory structured as follows : k-r
I am trying to build FFMPEG on Windows with MSVC. I am following this guide. I have managed to setup the environment in order to configure successfully, but mak
I have been trying for 4 days to: Deploy Oracle Instant Client with Docker. I can give you the Dockerfile but it is 96 lines To use Oracle Instant Client on my
I'm trying to control my C code in an Android NDK project depending on the selected ABI library. As a start, I want the NDK library method to answer, with a st
I'm following the instructions of someone whose repository I cloned to my machine. I want to use the make command as part of setting up the code environment, bu
❯ make --version GNU Make 3.81 ❯ bash --version GNU bash, version 3.2.57(1)-release (x86_64-apple-darwin18) How can I pass a variable from inside
I have a makefile that contains this code all: hello.exe hello.exe: hello.o gcc -o hello.exe hello.o hello.o: hello.c gcc -c hello.c clean: r
So, I'm trying to compile a homebrew program for the 3DS but when ever I run "make" I get this: E:\3DS-Stuff\fasthax>make 0 [main] make 16616 handle_exce
The Problem: Is it possible to give a target a different name or alias, such that it can be invoked using either the original target name or the alias. For ex
If I build a module which depends on other modules, and i get this warning: 'function or symbol ?' [source dir/my_module.ko] undefined! What does the warn
I'm writing a makefile like so: LIB_DIR = $(shell pwd)/.linuxbrew/Cellar/boost/1.62.0/ FLAGS = -std=c++14 INC= -I$(LIB_DIR)include LIB_PATH = -L$(LIB_DIR)lib
Hello i am new to ubuntu. I want to run a c program in ubuntu.On the terminal i typed "make ex1.c" (my file name is ex1) and the after pressing enter button , t
I have a slew of makefile targets that do the same thing: ${SOME_FILE}: ${FILES} | ${DIST_DIR} @@cat ${FILES} | \ sed 's/@D
make is halting and reporting an error code of 12 after attempting to zip -u some files. The error code 12 is actually an exit status from zip which indicates