C Code Memory Alignment on Embedded Systems [duplicate]

Question

I have a question regarding memory alignment in C language and microcontrollers. For A 32bit word size microcontroller I understand that a 4 byte variable should be aligned at an address multiple of 4 for easy access of words . Similarly with 2 byte variables should be aligned at an address multiple of 2 for easy access of half words.

But I can't really seem to understand why 8 byte variable should be aligned at an address multiple of 8 ?! the processor will already load it on 2 steps loading each word individually then why it shouldn't be on a 4byte alignment addresses ?! for example

typedef struct
{
    uint8_t x;
    uint64_t y;
}m;

why it's size is 16 bytes and not 12 what is the reason behind making it an 8 byte alignment even if my word size is only 4Bytes ?! Thanks in advance